Dr. Rozita teymourzadeh, CEng. (rozita_teymourzadeh) on Scribd | Scribd

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VLSI Implementation of Novel Class of High Speed Pipelined

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VLSI Implementation of High Speed and High Resolution FFT Algo...

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VLSI Implementation of High Resolution High Speed Low Latency ...

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VLSI Implementation of Cascaded Integrator Comb Filters for DS...

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Universal Computer Aided Design for Electrical Machines

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The Effect of the Digit Slicing Architecture on the Fft Butterfly

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Optimised Toolbox for the Design of Rotary Reluctance Motors

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On-Chip Implementation of Pipeline Digit-Slicing Multiplier-Le...

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On-Chip Implementation of High Speed and High Resolution Pipel...

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On-Chip Implementation of High Resolution High Speed Low Area ...

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On-Chip Implementation of Cascaded Integrated Comb Filters (CI...

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FPGA Implementation of Pipeline Digit-Slicing Multiplier-Less ...

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Design of Automatic Soil Humidity Control Using Maximum Power ...

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An Overview of the Decimation Process and Its VLSI Implementation

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An Improved Recursive and Non-Recursive Comb Filter for DSP Ap...

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Dr. Rozita teymourzadeh, CEng. (rozita_teymourzadeh) on Scribd | Scribd

Scholar and PhD Award

Scholar and PhD Award

SATURDAY, 24 SEPTEMBER 2011 21:32

By Shah Fizal Musa
Pic by Pkk and Photo Unit, UKM Press

BANGI,  24 Sept,  2011 

Rozita Teymourzadeh, the daughter of a dentist, chose Malaysia to further her studies in electronics and nanotechnology because of the climate and environment.

Malaysian hospitality had also attracted her to stay in the country where she lived for the past nine years.

She now lectures at UCSI University Cheras and has bought a condominium there. She considers Malaysia her second home and her family would travel to Malaysia on a regular basis.

Her experience in UKM  is a very pleasant one and she finds the academic staff very helpful. She feels that UKM has played a strong part in shaping her view of Malaysia and she hopes she could give something back to the community. 

UCSI University Inks Milestone MoU with CADD Centre - UCSI University

UCSI University Inks Milestone MoU with CADD Centre

July 2012

Kuala Lumpur - UCSI University's Engineering students may now obtain training and certification in commercial software by paying a fraction of the market price. This comes after the University signed a memorandum of understanding (MoU) with CADD Centre – Asia's largest training and certification provider for commercial software – to provide students with value-added training before they graduate. Under the MoU, the training will be conducted in-house and staff of UCSI University's Engineering Faculty may obtain the same training for free. Hailing the landmark deal, UCSI University deputy vice-chancellor (Academic Affairs and Research) Prof Emeritus Dr Lim Koon Ong said that the MoU was significant milestone in the University's long track record of industry-academia collaboration. "CADD has a strong presence in 16 countries and a trained CADD engineer walks out of one of the brand's 326 centres worldwide every six minutes," he said in his speech. "With this MoU, UCSI University students will be able to keep abreast of the latest industrial developments with constant exposure to the latest software. They will also be able to obtain training in software like Mathlab and Solidworks before they graduate." Prof Lim added that the two-way engagement with CADD would improve the University's curriculum, enhancing its strong standing as a university of choice for employers and strengthening its commitment to the Professional Board. Rohini Alagappar – Centre Head of CADD Malaysia – also lauded the move, saying that both parties were on the same page in their pursuit of excellence. "UCSI University has a tradition of placing strong emphasis on knowledge while CADD is renowned for skill training," she said in her speech. "Today's partnership creates synergy between the two organisations and we are happy to provide students with additional knowledge and value-added skills to complement what they learn at university." Adding that CADD's training and learning materials were meticulously prepared and printed after rigorous testing in the industry, Rohini extended an invite to UCSI University staff to visit CADD's headquarters in India. Assoc Prof Eng Dr Jimmy Mok, the dean of UCSI University's Engineering Faculty, was also present at the MoU signing ceremony.

UCSI University Inks Milestone MoU with CADD Centre - UCSI University

UCSI academic bags IET Young Woman Engineer Award 2012 - UCSI University

UCSI academic bags IET Young Woman Engineer Award 2012

21 July 2012

Kuala Lumpur, 21 July, 2012 - It was another significant milestone for UCSI University when Dr CEng Rozita Teymourzadeh edged out three other shortlisted candidates to clinch the Young Woman Engineer of the Year Award 2012 at the recent Institution of Engineering & Technology (IET) – Young Professionals Section (YPS) Annual Dinner. Conferred to successful female engineers who made positive contributions to the industry, the award effectively sets its winners apart as role models to aspiring female engineers. Dr Rozita, Chairman of the Faculty of Teaching and Learning and IDP Programme Coordinator under the University's Faculty of Engineering, Technology & Built Environment, received a certificate and plaque from IET UK for her feat. She will participate in numerous campaigns such as media interviews, school talks and career conventions, among others. As one of the selected candidates, Dr Rozita was interviewed by an adjudication panel comprising three key industry practitioners, namely, Ir Khalidah Haron, Managing Director of TNB Integrated Learning Solution (ILSAS), Alan Foley, Vice Chairman of IET Malaysia and Dr Edwin Tan, Head of Research at Monash University. Prior to working in Malaysia, Dr Rozita was a design engineer for ABB, a global leader in power and automation technologies, and she was involved in the tender process for a high voltage substation project – a project financially backed by the Government. Dr Rozita said that she learned a lot about the plug and switch system (PASS) and switchgears from the project and the knowledge benefited her professionally and personally. "It was a very tough challenge back then as engineering is a male-dominated industry," she said. "However, I taught myself to continually persevere despite setbacks and disappointments." On the local front, Dr Rozita has cooperated with MIMOS Berhad and Silterra on a digital signal processing system, a processor for electronic devices. Dr Rozita also opined that all published research should be distributed widely to reach a global audience to maximise its potential. She strongly emphasised the importance of knowledge sharing and that there were many free tools available for this purpose. Presently, Dr Rozita is a Chartered Engineer recognised by the Engineering Council of United Kingdom, and is a member of Institute of Electrical & Electronics Engineers (IEEE) and IET. Apart from the Young Woman Engineer of the Year Award 2012, three undergraduate students – namely, Ang Ming Joo, Low Chern Yee and Tan Ying Hua – did the Faculty proud when each was also awarded with the IET Student Chapter Leadership Award. FETBE Senior Lecturer Engr Rodney Tan Hean Gay, among other prominent IET committee members, was also present at the dinner.

UCSI academic bags IET Young Woman Engineer Award 2012 - UCSI University

DOAJ -- Directory of Open Access Journals

Abstract

Search result page Title: On-Chip Implementation of Pipeline Digit-Slicing Multiplier-Less Butterfly for Fast Fourier Transform Architecture Author: Yazan Samir Algnabi ; Rozita Teymourzadeh ; Masuri Othman ; Md Shabiul Islam ; Mok Vee Hong Abstract: Problem statement: The need for wireless communication has driven the communication systems to high performance. However, the main bottleneck that affects the communication capability is the Fast Fourier Transform (FFT), which is the core of most modulators. Approach: This study presented on-chip implementation of pipeline digit-slicing multiplier-less butterfly for FFT structure. The approach taken; in order to reduce computation complexity in butterfly, digit-slicing multiplier-less single constant technique was utilized in the critical path of Radix-2 Decimation In Time (DIT) FFT structure. The proposed design focused on the trade-off between the speed and active silicon area for the chip implementation. The new architecture was investigated and simulated with MATLAB software. The Verilog HDL code in Xilinx ISE environment was derived to describe the FFT Butterfly functionality and was downloaded to Virtex II FPGA board. Consequently, the Virtex-II FG456 Proto board was used to implement and test the design on the real hardware. Results: As a result, from the findings, the synthesis report indicates the maximum clock frequency of 549.75 MHz with the total equivalent gate count of 31,159 is a marked and significant improvement over Radix 2 FFT butterfly. In comparison with the conventional butterfly architecture, design that can only run at a maximum clock frequency of 198.987 MHz and the conventional multiplier can only run at a maximum clock frequency of 220.160 MHz, the proposed system exhibits better results. The resulting maximum clock frequency increases by about 276.28% for the FFT butterfly and about 277.06% for the multiplier. Conclusion: It can be concluded that on-chip implementation of pipeline digit-slicing multiplier-less butterfly for FFT structure is an enabler in solving problems that affect communications capability in FFT and possesses huge potentials for future related works and research areas. Journal: American Journal of Engineering and Applied Sciences Issn: 19417020 EIssn: 19417039 Year: 2010 Volume: 3 Issue: 4 pages/rec.No: 757-764 Keywords Pipelined digit-slicing multiplier-less ; Fast Fourier Transform (FFT) ; Verilog HDL ; Xilinx

DOAJ -- Directory of Open Access Journals